GASIM: the gate array graphical simulator for FPGA architecture learning

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dc.contributor.authorde Castro Cuevas, Osberth Cristhian
dc.contributor.authorMurrugarra Quiroz, Cecilia
dc.contributor.orcidMurrugarra Quiroz, Cecilia [0000-0001-9439-5418]
dc.contributor.orcidde Castro Cuevas, Osberth Cristhian [0000-0003-4554-3271]
dc.date.accessioned2020-05-13T17:01:08Z
dc.date.available2020-05-13T17:01:08Z
dc.date.issued2019
dc.description.abstractenglishField Programmable Gate Arrays, also called FPGA, are the main contemporary tool for digital systems learning and development. Its benefits are more than evident, but also are its internal complexity. The widespread use of FPGA devices has created a necessity for understanding the inner logic using diagrams or theoretical explanations. This paper presents an innovative approach for FPGA basic architecture learning called GASIM. A conceptually complete model for a simple but general 2-D graphical FPGA has been designed and implemented in such a way that is easy to understand, aesthetically appealing from the student's point of view, and also easy to use by any teacher. The aim of this kind of design is to fill the conceptual gap we have found while teaching FPGA based courses. The final tool is a 2-D modular graphical library for a standalone logic simulator that not only allows teachers and students to program an FPGA model and simulate every aspect of its internal logic complexities but also to construct their own limited, but complete FPGA structure using drag and drop graphical modules and programmable interconnections. Our study provides a technical description of the tool, and our first results in the classroom.eng
dc.format.mimetypeapplication/pdf
dc.identifier.doihttps://doi.org/10.1109/RITA.2019.2942254
dc.identifier.issn1932-8540
dc.identifier.urihttps://hdl.handle.net/20.500.12495/2684
dc.language.isoeng
dc.publisherIEEEspa
dc.publisher.journalIEEE Revista Iberoamericana de Tecnologias del Aprendizajespa
dc.relation.ispartofseriesIEEE Revista Iberoamericana de Tecnologias del Aprendizaje, 1932-8540, Vol 14, Num 3, 2019, pag 95 - 105spa
dc.relation.urihttps://ieeexplore.ieee.org/document/8844792/authors#authors
dc.rights.creativecommons2019
dc.rights.localAcceso cerradospa
dc.subject.armarcAnálisis de circuitos eléctricosspa
dc.subject.armarcCircuitos electrónicosspa
dc.subject.armarcSistemas de computadorspa
dc.subject.keywordsField programmable gate arraysspa
dc.subject.keywordsToolsspa
dc.subject.keywordsLogic gatesspa
dc.subject.keywordsRoutingspa
dc.subject.keywordsDigital circuitsspa
dc.subject.keywordsComputer architecturespa
dc.subject.keywordsTwo dimensional displaysspa
dc.subject.keywordsDevicesspa
dc.subject.keywordsDigital systemsspa
dc.subject.keywordsLearningspa
dc.subject.keywordsSimulatorsspa
dc.subject.keywordsTeachingspa
dc.titleGASIM: the gate array graphical simulator for FPGA architecture learningspa
dc.title.translatedGASIM: the gate array graphical simulator for FPGA architecture learningspa
dc.typearticlespa
dc.type.hasversioninfo:eu-repo/semantics/publishedVersion
dc.type.localartículospa

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